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Principal Engineer - FPGA/ASIC Design

Professional · Washington D.C. RRNA Headquarters

Work pattern
Hybrid
Employment
Permanent
Level
Lead
Posted
18 Sep 2026

Required skills, as the advert states them

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About this opportunity

Job Description Job Title: Principal Engineer - FPGA/ASIC Design Working Pattern: Hybrid (3 office days a week) Working location: Reston, VA Rolls-Royce is looking for a Principal Engineer - FPGA/ASIC Design (Field Programmable Gate Arrays / Application Specific Integrated Circuit) Design Specialist to join our growing team.

Read the full advert and apply on Professional's site →

Collected from Professional's own careers site (Workday). Posted 18 Sep 2026. TUNAI shows an excerpt and the facts it read from the advert; the employer's page has the full description and the application.

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